Bug 63581 - PCI host bridge _CRS parsing (I/O port space)
PCI host bridge _CRS parsing (I/O port space)
Status: CLOSED DOCUMENTED
Product: ACPI
Classification: Unclassified
Component: Config-Other
All Linux
: P1 normal
Assigned To: acpi_config-other
http://lkml.kernel.org/r/1381474332-1...
:
Depends on:
Blocks:
  Show dependency treegraph
 
Reported: 2013-10-23 22:13 UTC by Bjorn Helgaas
Modified: 2014-06-16 16:56 UTC (History)
2 users (show)

See Also:
Kernel Version: 3.11
Tree: Mainline
Regression: No


Attachments
acpi.disasm (partial) (74.07 KB, text/plain)
2013-10-23 22:23 UTC, Bjorn Helgaas
Details

Description Bjorn Helgaas 2013-10-23 22:13:30 UTC
This is not a defect report; it's just a place to archive acpidump information for the _CRS parsing changes Lan Tianyu is making.

This acpidump info is from an HP SuperDome 8-blade system.  It was generated with an EFI dumper, not with the usual Linux "pmtools" package.
Comment 1 Bjorn Helgaas 2013-10-23 22:23:21 UTC
Created attachment 112131 [details]
acpi.disasm (partial)

These are 16 device nodes for PCIe host bridges from an 8-blade HP SuperDome.  The whole system has 96 host bridges.
Comment 2 Bjorn Helgaas 2013-10-24 15:43:56 UTC
The question here is how to apply _TRA to I/O port space descriptors in _CRS.

We currently handle these descriptors ad hoc in add_window() (for ia64, where we do handle _TRA) and in setup_resource() (for x86, where we don't do anything with _TRA).

Lan's patch [1] applies _TRA in the generic acpi_dev_resource_address_space(), and another patch [2] converts ia64 from the ad hoc handling to the generic handling.  The problem is that the ia64 code handles _TRA differently than [1] does.

My proposal is that [1] should be modified to skip _TRA when the _TTP ("I/O to Memory Translation") bit is set.  Here's a sample I/O port space descriptor from the acpidump in comment #1:

          QWORD Address Space Descriptor:
             Type: I/O
             Flags:  Sparse, Translate, ISA I/O addresses, Non-ISA I/O addresses
             GRA: 0x0000000000000000
             MIN: 0x0000000000000000  MAX: 0x000000000000ffff
             TRA: 0x00000400d0000000  LEN: 0x0000000000010000

This window is memory on the upstream side and the host bridge converts it to I/O port space (PCI bus I/O ports 0x0000-0xffff) on the downstream side.  The HP BIOS encodes the base memory address on the upstream side in _TRA.

The ACPI spec isn't very explicit about how to handle this, but I think the HP interpretation is reasonable and I'm not aware of any conflicting implementations, so I think we should adopt it.

[1] http://lkml.kernel.org/r/1381474332-11328-3-git-send-email-tianyu.lan@intel.com
[2] http://lkml.kernel.org/r/1381474332-11328-6-git-send-email-tianyu.lan@intel.com

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