Kernel Bug Tracker – Bug 63581
PCI host bridge _CRS parsing (I/O port space)
Last modified: 2014-06-16 16:56:25 UTC
This is not a defect report; it's just a place to archive acpidump information for the _CRS parsing changes Lan Tianyu is making.
This acpidump info is from an HP SuperDome 8-blade system. It was generated with an EFI dumper, not with the usual Linux "pmtools" package.
Created attachment 112131 [details]
These are 16 device nodes for PCIe host bridges from an 8-blade HP SuperDome. The whole system has 96 host bridges.
The question here is how to apply _TRA to I/O port space descriptors in _CRS.
We currently handle these descriptors ad hoc in add_window() (for ia64, where we do handle _TRA) and in setup_resource() (for x86, where we don't do anything with _TRA).
Lan's patch  applies _TRA in the generic acpi_dev_resource_address_space(), and another patch  converts ia64 from the ad hoc handling to the generic handling. The problem is that the ia64 code handles _TRA differently than  does.
My proposal is that  should be modified to skip _TRA when the _TTP ("I/O to Memory Translation") bit is set. Here's a sample I/O port space descriptor from the acpidump in comment #1:
QWORD Address Space Descriptor:
Flags: Sparse, Translate, ISA I/O addresses, Non-ISA I/O addresses
MIN: 0x0000000000000000 MAX: 0x000000000000ffff
TRA: 0x00000400d0000000 LEN: 0x0000000000010000
This window is memory on the upstream side and the host bridge converts it to I/O port space (PCI bus I/O ports 0x0000-0xffff) on the downstream side. The HP BIOS encodes the base memory address on the upstream side in _TRA.
The ACPI spec isn't very explicit about how to handle this, but I think the HP interpretation is reasonable and I'm not aware of any conflicting implementations, so I think we should adopt it.