Bug 38492 - sandy bridge gpu crash on z68 chipset (related to power saving)
sandy bridge gpu crash on z68 chipset (related to power saving)
Status: RESOLVED CODE_FIX
Product: Drivers
Classification: Unclassified
Component: Video(DRI - Intel)
All Linux
: P1 high
Assigned To: drivers_video-dri-intel@kernel-bugs.osdl.org
:
Depends on:
Blocks:
  Show dependency treegraph
 
Reported: 2011-06-28 20:57 UTC by Jools Wills
Modified: 2012-03-25 00:10 UTC (History)
4 users (show)

See Also:
Kernel Version: 3.0.0rc5
Tree: Mainline
Regression: No


Attachments
output of lspci -v (8.02 KB, text/plain)
2011-06-28 20:57 UTC, Jools Wills
Details
output of dmidecode (8.80 KB, text/plain)
2011-06-28 20:58 UTC, Jools Wills
Details

Description Jools Wills 2011-06-28 20:57:08 UTC
I switched from a h67 motherboard to a z68 based one (asrock z68 pro3). Problems were apparent immediately, with lockups happening after a few seconds/minutes (usually sooner rather than later but sometimes it went for longer). Sometimes everything froze, but mostly a black screen with some vertical flicking pixels. machine has to be powered off to bring it back.

I got some slightly better stability by overvolting the gpu slightly from within the bios, but it didn't solve the issue. As everything was fine when booting to windows, i had a nose at the code related to power saving, as I suspected it was related to this. and indeed by disabling the power saving code "gen6_enable_rps" my system is stable with no crashes.

Not ruling out a bug with the mb/bios/chipset implementation of course, as everything was fine when the cpu was on my h67 based board. Please do give me some guidance on how to help further with this. for now, I'm happy to have a usable system. Ill provide lspci -v and dmidecode logs, let me know if you need more.

my quick hack to disable power saving:

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index aa43e7b..06627ec 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7787,8 +7787,8 @@ void intel_modeset_init(struct drm_device *dev)
                intel_init_emon(dev);
        }
 
-       if (IS_GEN6(dev))
-               gen6_enable_rps(dev_priv);
+       //if (IS_GEN6(dev))
+               //gen6_enable_rps(dev_priv);
 
        INIT_WORK(&dev_priv->idle_work, intel_idle_update);
        setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer,
@@ -7829,8 +7829,8 @@ void intel_modeset_cleanup(struct drm_device *dev)
 
        if (IS_IRONLAKE_M(dev))
                ironlake_disable_drps(dev);
-       if (IS_GEN6(dev))
-               gen6_disable_rps(dev);
+       //if (IS_GEN6(dev))
+       //      gen6_disable_rps(dev);
 
        if (IS_IRONLAKE_M(dev))
                ironlake_disable_rc6(dev);

pretty serious bug anyway as makes the system pretty much unusable without it. I hope a real fix can be found.
Comment 1 Jools Wills 2011-06-28 20:57:50 UTC
Created attachment 63812 [details]
output of lspci -v
Comment 2 Jools Wills 2011-06-28 20:58:10 UTC
Created attachment 63822 [details]
output of dmidecode
Comment 3 Jools Wills 2011-07-18 12:10:21 UTC
A new bios 1.50 was released for this motherboard with the description "Modify default setting for IGPU voltage." - running now with the new bios without my modifications above to see if this has been sorted and it was indeed a wrong bios default not playing nice with the power saving code.
Comment 4 Paul Klapperich 2011-07-28 15:52:50 UTC
I was going to comment that even with the P1.50 UEFI from ASRock, I was still having issues with this motherboard and had to use the vesa driver as a workaround.

Last night I updated to version P1.60 which was recently released and made sure to "Load UEFI Defaults" before booting. All seems fine now and I can use the intel X11 driver with a compositing window manager.
Comment 5 Daniel Vetter 2012-03-25 00:10:30 UTC
Looks like all the issues are fixed by bios upgrades. Please reopen in case that's not quite true and you experience hangs again.

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