Created attachment 293651 [details] Photo of console crash Since 5.10-rc1 I cannot boot an ARM64 Synquacer development box [1]. I've bisected this down to the upstream commit: commit e0d072782c734d27f5af062c62266f2598f68542 (HEAD, refs/bisect/bad) Author: Jim Quinlan <james.quinlan@broadcom.com> Date: Thu Sep 17 18:43:40 2020 +0200 dma-mapping: introduce DMA range map, supplanting dma_pfn_offset it appears to be affecting sdhci. Disabling sdhci and/or reverting the above commit allows the Synquacer to boot without the crash. Attached is a photo of the console at a point where I was able to catch the crash. References: [1] https://www.socionext.com/en/products/assp/SynQuacer/Edge/
Device tree info: dtc -I fs /sys/firmware/devicetree/base <stdout>: Warning (dma_ranges_format): /:dma-ranges: Root node has a "dma-ranges" property <stdout>: Warning (clocks_property): /gpio@51000000:clocks: cell 0 is not a phandle reference <stdout>: Warning (clocks_property): /ethernet@522d0000:clocks: cell 0 is not a phandle reference <stdout>: Warning (clocks_property): /uart@51040000:clocks: cell 0 is not a phandle reference <stdout>: Warning (clocks_property): /uart@51040000:clocks: cell 1 is not a phandle reference <stdout>: Warning (clocks_property): /uart@2a400000:clocks: cell 0 is not a phandle reference <stdout>: Warning (clocks_property): /uart@2a400000:clocks: cell 1 is not a phandle reference <stdout>: Warning (clocks_property): /mhu@45000000:clocks: cell 0 is not a phandle reference <stdout>: Warning (clocks_property): /sdhci@52300000:clocks: cell 0 is not a phandle reference <stdout>: Warning (clocks_property): /sdhci@52300000:clocks: cell 1 is not a phandle reference <stdout>: Warning (mboxes_property): /scpi:mboxes: cell 0 is not a phandle reference /dts-v1/; / { dma-ranges = <0x00 0x00 0x00 0x00 0x100 0x00>; #address-cells = <0x02>; model = "Socionext Developer Box"; #size-cells = <0x02>; interrupt-parent = <0x01>; compatible = "socionext,developer-box\0socionext,synquacer"; pcie@70000000 { #address-cells = <0x03>; dma-coherent; bus-range = <0x00 0x7e>; interrupt-map = <0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0xb6 0x04>; #size-cells = <0x02>; device_type = "pci"; interrupt-map-mask = <0x00 0x00 0x00 0x00>; compatible = "socionext,synquacer-pcie-ecam\0snps,dw-pcie-ecam"; ranges = <0x1000000 0x00 0x10000 0x00 0x77f00000 0x00 0x10000 0x2000000 0x00 0x78000000 0x00 0x78000000 0x00 0x8000000 0x3000000 0x3f 0x00 0x3f 0x00 0x01 0x00>; msi-map = <0x00 0x22 0x10000 0x7f00>; #interrupt-cells = <0x01>; reg = <0x00 0x70000000 0x00 0x7f00000>; }; sd4clk800 { clock-output-names = "sd_sd4clk"; #clock-cells = <0x00>; clock-frequency = <0x2faf0800>; compatible = "fixed-clock"; phandle = <0x23>; }; gpio@51000000 { gpio-controller; gpio-line-names = "DSW3-PIN1\0DSW3-PIN2\0DSW3-PIN3\0DSW3-PIN4\0DSW3-PIN5\0DSW3-PIN6\0DSW3-PIN7\0DSW3-PIN8\0PSIN#\0PWROFF#\0GPIO-A\0GPIO-B\0GPIO-C\0GPIO-D\0PCIE1EXTINT\0PCIE0EXTINT\0PHY2-INT#\0PHY1-INT#\0GPIO-E\0GPIO-F\0GPIO-G\0GPIO-H\0GPIO-I\0GPIO-J\0GPIO-K\0GPIO-L\0PEC-PD26\0PEC-PD27\0PEC-PD28\0PEC-PD29\0PEC-PD30\0PEC-PD31"; base = <0x00>; clocks = <0x1c>; compatible = "socionext,synquacer-gpio\0fujitsu,mb86s70-gpio"; reg = <0x00 0x51000000 0x00 0x100>; #gpio-cells = <0x02>; }; iommu@582c0000 { #global-interrupts = <0x01>; interrupts = <0x00 0xca 0x04 0x00 0xca 0x04 0x00 0xca 0x04>; #iommu-cells = <0x01>; compatible = "arm,mmu-500\0arm,smmu-v2"; status = "disabled"; reg = <0x00 0x582c0000 0x00 0x10000>; }; ethernet@522d0000 { phy-mode = "rgmii"; dma-coherent; clock-names = "phy_ref_clk"; interrupts = <0x00 0xb0 0x04>; clocks = <0x20>; max-speed = <0x3e8>; max-frame-size = <0x2328>; compatible = "socionext,synquacer-netsec"; reg = <0x00 0x522d0000 0x00 0x10000 0x00 0x8080000 0x00 0x10000>; phy-handle = <0x21>; mdio { #address-cells = <0x01>; #size-cells = <0x00>; ethernet-phy@7 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x07>; phandle = <0x21>; }; }; }; interrupt-controller@30000000 { #address-cells = <0x02>; interrupts = <0x01 0x09 0x08>; #size-cells = <0x02>; compatible = "arm,gic-v3"; ranges; #interrupt-cells = <0x03>; reg = <0x00 0x30000000 0x00 0x10000 0x00 0x30400000 0x00 0x300000 0x00 0x2c000000 0x00 0x2000 0x00 0x2c010000 0x00 0x1000 0x00 0x2c020000 0x00 0x2000>; phandle = <0x01>; interrupt-controller; gic-its@30020000 { socionext,synquacer-pre-its = <0x58000000 0x200000>; msi-controller; compatible = "arm,gic-v3-its"; reg = <0x00 0x30020000 0x00 0x20000>; phandle = <0x22>; #msi-cells = <0x01>; }; }; refclk62500khz { clock-output-names = "uartclk"; #clock-cells = <0x00>; clock-frequency = <0x3b9aca0>; compatible = "fixed-clock"; phandle = <0x1f>; }; uart@51040000 { reg-io-width = <0x04>; clock-names = "baudclk\0apb_pclk"; interrupts = <0x00 0xa8 0x04>; clocks = <0x1f 0x1c>; compatible = "snps,dw-apb-uart"; reg = <0x00 0x51040000 0x00 0x1000>; reg-shift = <0x02>; }; refclk125mhz { #clock-cells = <0x00>; clock-frequency = <0x7735940>; compatible = "fixed-clock"; phandle = <0x20>; }; psci { method = "smc"; compatible = "arm,psci-1.0"; }; idle-states { entry-method = "arm,psci"; cpu-sleep-0 { entry-latency-us = <0x12c>; local-timer-stop; exit-latency-us = <0x4b0>; arm,psci-suspend-param = <0x10000>; compatible = "arm,idle-state"; phandle = <0x02>; min-residency-us = <0x7d0>; }; cluster-sleep-0 { entry-latency-us = <0x190>; local-timer-stop; exit-latency-us = <0x4b0>; arm,psci-suspend-param = <0x1010000>; compatible = "arm,idle-state"; phandle = <0x03>; min-residency-us = <0x9c4>; }; }; gpio-keys { interrupt-parent = <0x25>; compatible = "gpio-keys"; power { wakeup-source; interrupts = <0x00 0x78 0x02>; label = "Power Button"; linux,code = <0x74>; }; }; scpi { shmem = <0x1e>; compatible = "arm,scpi"; mboxes = <0x1d 0x01>; }; bclk200 { clock-output-names = "sd_bclk"; #clock-cells = <0x00>; clock-frequency = <0xbebc200>; compatible = "fixed-clock"; phandle = <0x24>; }; sram@45200000 { #address-cells = <0x01>; #size-cells = <0x01>; compatible = "mmio-sram"; ranges = <0x00 0x00 0x45200000 0x200>; reg = <0x00 0x45200000 0x00 0x200>; scp-shmem@0 { reg = <0x00 0x200>; phandle = <0x1e>; }; }; refclk100mhz { clock-output-names = "apb_pclk"; #clock-cells = <0x00>; clock-frequency = <0x5f5e100>; compatible = "fixed-clock"; phandle = <0x1c>; }; timer { interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>; compatible = "arm,armv8-timer"; }; aliases { serial1 = "/uart@51040000"; serial0 = "/uart@2a400000"; }; uart@2a400000 { clock-names = "uartclk\0apb_pclk"; interrupts = <0x00 0x3f 0x04>; clocks = <0x1f 0x1c>; compatible = "arm,pl011\0arm,primecell"; reg = <0x00 0x2a400000 0x00 0x1000>; }; mhu@45000000 { clock-names = "apb_pclk"; interrupts = <0x00 0x1e2 0x04 0x00 0x1e0 0x04>; clocks = <0x1c>; #mbox-cells = <0x01>; compatible = "arm,mhu\0arm,primecell"; interrupt-names = "mhu_lpri_rx\0mhu_hpri_rx"; reg = <0x00 0x45000000 0x00 0x1000>; phandle = <0x1d>; }; mmio-timer@2a810000 { #address-cells = <0x02>; #size-cells = <0x02>; clock-frequency = <0x5f5e100>; compatible = "arm,armv7-timer-mem"; ranges; reg = <0x00 0x2a810000 0x00 0x10000>; frame@2a830000 { interrupts = <0x00 0x3c 0x04>; frame-number = <0x00>; reg = <0x00 0x2a830000 0x00 0x10000>; }; }; chosen { linux,uefi-mmap-size = <0x6f0>; linux,initrd-end = <0x00 0xf2b1cc1d>; bootargs = "BOOT_IMAGE=/boot/vmlinuz-5.8.0-20-generic root=UUID=aef9a4d6-0a7d-4784-bf29-85576cd88b82 ro nouveau.modeset=0 debug ignore_loglevel"; linux,uefi-mmap-start = <0x00 0xf7350018>; linux,uefi-mmap-desc-size = <0x30>; linux,uefi-mmap-desc-ver = <0x01>; linux,initrd-start = <0x00 0xed2ef000>; linux,uefi-secure-boot = <0x02>; linux,uefi-system-table = <0x00 0xfe810018>; }; pmu { interrupts = <0x01 0x07 0x08>; compatible = "arm,armv8-pmuv3"; }; cpus { #address-cells = <0x01>; #size-cells = <0x00>; cpu@501 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x501>; enable-method = "psci"; phandle = <0x0f>; }; cpu@a01 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0xa01>; enable-method = "psci"; phandle = <0x19>; }; cpu@1 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x01>; enable-method = "psci"; phandle = <0x05>; }; cpu@801 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x801>; enable-method = "psci"; phandle = <0x15>; }; cpu@300 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x300>; enable-method = "psci"; phandle = <0x0a>; }; cpu@101 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x101>; enable-method = "psci"; phandle = <0x07>; }; cpu@600 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x600>; enable-method = "psci"; phandle = <0x10>; }; cpu@b00 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0xb00>; enable-method = "psci"; phandle = <0x1a>; }; cpu@401 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x401>; enable-method = "psci"; phandle = <0x0d>; }; cpu@900 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x900>; enable-method = "psci"; phandle = <0x16>; }; cpu@701 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x701>; enable-method = "psci"; phandle = <0x13>; }; cpu-map { cluster2 { core1 { cpu = <0x09>; }; core0 { cpu = <0x08>; }; }; cluster10 { core1 { cpu = <0x19>; }; core0 { cpu = <0x18>; }; }; cluster0 { core1 { cpu = <0x05>; }; core0 { cpu = <0x04>; }; }; cluster9 { core1 { cpu = <0x17>; }; core0 { cpu = <0x16>; }; }; cluster7 { core1 { cpu = <0x13>; }; core0 { cpu = <0x12>; }; }; cluster5 { core1 { cpu = <0x0f>; }; core0 { cpu = <0x0e>; }; }; cluster3 { core1 { cpu = <0x0b>; }; core0 { cpu = <0x0a>; }; }; cluster11 { core1 { cpu = <0x1b>; }; core0 { cpu = <0x1a>; }; }; cluster1 { core1 { cpu = <0x07>; }; core0 { cpu = <0x06>; }; }; cluster8 { core1 { cpu = <0x15>; }; core0 { cpu = <0x14>; }; }; cluster6 { core1 { cpu = <0x11>; }; core0 { cpu = <0x10>; }; }; cluster4 { core1 { cpu = <0x0d>; }; core0 { cpu = <0x0c>; }; }; }; cpu@200 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x200>; enable-method = "psci"; phandle = <0x08>; }; cpu@500 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x500>; enable-method = "psci"; phandle = <0x0e>; }; cpu@a00 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0xa00>; enable-method = "psci"; phandle = <0x18>; }; cpu@0 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x00>; enable-method = "psci"; phandle = <0x04>; }; cpu@301 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x301>; enable-method = "psci"; phandle = <0x0b>; }; cpu@800 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x800>; enable-method = "psci"; phandle = <0x14>; }; cpu@601 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x601>; enable-method = "psci"; phandle = <0x11>; }; cpu@b01 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0xb01>; enable-method = "psci"; phandle = <0x1b>; }; cpu@100 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x100>; enable-method = "psci"; phandle = <0x06>; }; cpu@901 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x901>; enable-method = "psci"; phandle = <0x17>; }; cpu@400 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x400>; enable-method = "psci"; phandle = <0x0c>; }; cpu@201 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x201>; enable-method = "psci"; phandle = <0x09>; }; cpu@700 { cpu-idle-states = <0x02 0x03>; device_type = "cpu"; compatible = "arm,cortex-a53\0arm,armv8"; reg = <0x700>; enable-method = "psci"; phandle = <0x12>; }; }; sdhci@52300000 { dma-coherent; clock-names = "core\0iface"; bus-width = <0x08>; interrupts = <0x00 0x98 0x04 0x00 0x99 0x04>; clocks = <0x23 0x24>; fujitsu,cmd-dat-delay-select; compatible = "socionext,synquacer-sdhci\0fujitsu,mb86s70-sdhci-3.0"; reg = <0x00 0x52300000 0x00 0x1000>; cap-mmc-highspeed; }; interrupt-controller@510c0000 { interrupt-parent = <0x01>; socionext,spi-base = <0x70>; compatible = "socionext,synquacer-exiu"; #interrupt-cells = <0x03>; reg = <0x00 0x510c0000 0x00 0x20>; phandle = <0x25>; interrupt-controller; }; pcie@60000000 { #address-cells = <0x03>; dma-coherent; bus-range = <0x00 0x7e>; interrupt-map = <0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0xbe 0x04>; #size-cells = <0x02>; device_type = "pci"; interrupt-map-mask = <0x00 0x00 0x00 0x00>; compatible = "socionext,synquacer-pcie-ecam\0snps,dw-pcie-ecam"; ranges = <0x1000000 0x00 0x00 0x00 0x67f00000 0x00 0x10000 0x2000000 0x00 0x68000000 0x00 0x68000000 0x00 0x8000000 0x3000000 0x3e 0x00 0x3e 0x00 0x01 0x00>; msi-map = <0x00 0x22 0x00 0x7f00>; #interrupt-cells = <0x01>; reg = <0x00 0x60000000 0x00 0x7f00000>; }; };
So I updated the firmware using the following capsule: http://snapshots.linaro.org/components/kernel/leg-96boards-developerbox-edk2/latest/DeveloperBox.Cap sudo apt install fwupdate wget http://snapshots.linaro.org/components/kernel/leg-96boards-developerbox-edk2/latest/DeveloperBox.Cap sudo fwupdate --apply {50b94ce5-8b63-4849-8af4-ea479356f0e3} DeveloperBox.Cap sudo reboot After the firmware was updated the box boots fine. So it's a Device Tree config issue that's fixed with the latest firmware upgrade. This is not a kernel issue per se.