Created attachment 286741 [details] DPCD dump of the first ~5000 Bytes/Regs The panel reports 10 bpc color depth in its EDID, and the UEFI firmware chooses link settings at boot which support enough bandwidth for 10 bpc (324000 kbit/sec to be precise, aka DP_LINK_BW_SET == 0xc), but the DP_MAX_LINK_RATE dpcd register only reports 0xa == 2.7 Gbps as possible, so intel_dp_set_sink_rates() would cap at that. This restricts achievable color depth to 8 bpc, not providing the full color depth of the panel. This report relates to dri-devel patch "drm/i915/dp: Add current maximum eDP link rate to sink_rate array." Attached is a DPCD dump of the first ~ 5000 Bytes/Registers of the eDP panel.
FWIW we don't really look at i915 bugs at bugzilla.kernel.org, except to tell you to report i915 bugs at https://gitlab.freedesktop.org/drm/intel/issues/new
https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs