Bug 65521

Summary:	pciehp ignores Data Link Layer State Changed bit
Product:	Drivers	Reporter:	Bjorn Helgaas (bjorn)
Component:	PCI	Assignee:	drivers_pci (drivers_pci)
Status:	NEW ---
Severity:	normal	CC:	mmokrejs, rajatxjain, szg00000
Priority:	P1
Hardware:	All
OS:	Linux
Kernel Version:	3.12	Subsystem:
Regression:	No	Bisected commit-id:
Attachments:	lspci diff

Description Bjorn Helgaas 2013-11-22 16:53:04 UTC

Created attachment 115661 [details]
lspci diff

Martin Mokrejs <mmokrejs@fold.natur.cuni.cz> reported that when an ExpressCard is removed, the upstream PCIe switch sets the Data Link Layer State Changed bit in its PCIe Capability Slot Status register.  This is normal because obviously the link can no longer be active after the downstream device has been removed.

However, the pciehp interrupt handler should clear the bit so we can detect future link state changes.

The attached lspci diff shows the difference between

  - boot-time, with slot empty, and
  - after ExpressCard has been inserted and removed, so slot is again empty

Here's the relevant part:

  00:1c.7 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset Family PCI Express Root Port 8 (rev b5) (prog-if 00 [Normal decode])
  -               LnkCap: Port #8, Speed 5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <16us
  +               LnkCap: Port #8, Speed 5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <16us
  -               LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk-
  +               LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
  -               LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
  +               LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt-
                  SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
  -                       Changed: MRL- PresDet- LinkState-
  +                       Changed: MRL- PresDet- LinkState+

Comment 1 Rajat Jain 2013-11-25 19:13:08 UTC

Hello,

Just FYI, here is a patch set that adds the support of Link state changes to the pciehp hot-plug machinery (and also takes care of this issue).

Cover Letter:
https://lkml.org/lkml/2013/11/19/531

Patch set:
https://lkml.org/lkml/2013/11/19/542
https://lkml.org/lkml/2013/11/19/543
https://lkml.org/lkml/2013/11/19/550
https://lkml.org/lkml/2013/11/19/555

(Sorry, for some reason, my email client sent them out as _new_ topics each. Apologies for the inconvenience).

Thanks,

Rajat

Comment 2 Rajat Jain 2015-06-19 13:30:11 UTC

Hi Bjorn,

Time to close this bug I think?

Thanks,

Rajat

Comment 3 Bjorn Helgaas 2015-06-19 23:17:51 UTC

Probably so.  If you chase down the relevent commit(s), it'd be nice to mention them here and the kernel version where they appeared.