Bug 2564
| Summary: | enable use of IRQ2 in ACPI/IOAPIC mode -- delete "cascade" interrupt | ||
|---|---|---|---|
| Product: | ACPI | Reporter: | Len Brown (lenb) |
| Component: | Config-Interrupts | Assignee: | Len Brown (lenb) |
| Status: | CLOSED CODE_FIX | ||
| Severity: | normal | CC: | acpi-bugzilla |
| Priority: | P2 | ||
| Hardware: | i386 | ||
| OS: | Linux | ||
| Kernel Version: | 2.6.5 | Subsystem: | |
| Regression: | --- | Bisected commit-id: | |
| Attachments: | 2.6.5 patch | ||
Created attachment 2650 [details]
2.6.5 patch
two parts to this patch
1. delete the setup_irq(2, &irq2) for cascade
2. set io_apic_irqs to 0xFFFFFFFF
so that IRQ2 will get an identity mapping if overrides don't prevent it
so irq2 will get a vector
so init_IO_APIC_trapcs() will not make_8259A_irq(2)
shipped in 2.6.6, and on top of 2.4.27-pre2 -- closing. |
The current kernel reserves IRQ2 for a "cascade" interrupt: CPU0 CPU1 0: 42115460 42772218 IO-APIC-edge timer 1: 214789 218925 IO-APIC-edge keyboard 2: 0 0 XT-PIC cascade 4: 10087 5750 IO-APIC-edge serial The concept was to reserve this IRQ for "mixed mode" configurations supported by MPS- 1.4 where the PIC is routed to the APIC pin-2. However, ACPI does not support mixed-mode configurations, and so this reservation adds no value, and on some systems it prevents use of IRQ2 for other purposes. Witih "cascade" gone, however, most PCs will still not use IRQ2, because the typical PC has an interrupt over-ride mapping IRQ0->pin-2 for the legacy PIT timer. While this doesn't technically consume the label IRQ2, it takes pin-2, which prevents the system from setting up a default identity mapping from IRQ2->pin2. So with cascade gone there are to ways to use IRQ2: 1. if no IRQ0->pin2 override the nforce2 is an example -- it connects the timer to pin0 and so a (correct BIOS) doesn't have an IRQ0->pin2 override. (of course the board would still need to connect a device to this pin) Another example is the ES7000, which maps IRQ0->pin20 for its legacy timer, leaving IRQ2 and pin2 free for an identity mapping, which is routed to a PCI interrupt per an ACPI _PRT entry. 2. IRQ0->pin2 override present An additional override can be added to the BIOS to map IRQ2 to a free pin. eg IRQ2->pin0 plus the above would exchange the default IRQ0/IRQ2 names given to pin0/pin2.