Bug 217698

Summary: amd_gpio AMDI0030:00: Invalid config param 0014
Product: Drivers Reporter: sander44 (ionut_n2001)
Component: I2CAssignee: Mario Limonciello (AMD) (mario.limonciello)
Status: ASSIGNED ---    
Severity: normal CC: mario.limonciello, micheledellaguardia, xmb8dsv4
Priority: P3    
Hardware: AMD   
OS: Linux   
Kernel Version: 6.5.0-rc2 Subsystem:
Regression: No Bisected commit-id:
Attachments: gpio.txt

Description sander44 2023-07-22 17:20:34 UTC 
Hi Kernel Team,

I tried to start version 6.5.0-rc2 today.
But I noticed some error messages on the AMD GPIO side.


Errors:
[    1.251704] amd_gpio AMDI0030:00: Invalid config param 0014
[    1.251728] amd_gpio AMDI0030:00: Invalid config param 0014
[    1.251745] amd_gpio AMDI0030:00: Invalid config param 0014
[    1.251757] amd_gpio AMDI0030:00: Invalid config param 0014
[    1.251769] amd_gpio AMDI0030:00: Invalid config param 0014
[    3.222195] amd_gpio AMDI0030:00: Invalid config param 0014

dmesg | grep -E "amd_gpio|amd|pcieport|GPIO|pin|IRQ|amdgpu"
[    0.000000] Command line: initrd=\efi\nixos\g40mgrcx8fa31w7wbnhpz2zkpp79kr6h-initrd-linux-6.5.0-initrd.efi init=/nix/store/7y2qa963pafggy75ivpndw0vx4lvdbi3-nixos-system-ionutnechita-arz2022-23.11.git.680a714e160/init amd_pstate=active apparmor=1 security=apparmor clocksource=tsc tsc=reliable cpuidle loglevel=0 acpi_enforce_resources=lax vt.handoff=7 nouveau.modeset=0 systemd.show_status=1 nvme_core.default_ps_max_latency_us=400 quiet splash loglevel=0
[    0.003421] Using GB pages for direct mapping
[    0.044308] Kernel command line: initrd=\efi\nixos\g40mgrcx8fa31w7wbnhpz2zkpp79kr6h-initrd-linux-6.5.0-initrd.efi init=/nix/store/7y2qa963pafggy75ivpndw0vx4lvdbi3-nixos-system-ionutnechita-arz2022-23.11.git.680a714e160/init amd_pstate=active apparmor=1 security=apparmor clocksource=tsc tsc=reliable cpuidle loglevel=0 acpi_enforce_resources=lax vt.handoff=7 nouveau.modeset=0 systemd.show_status=1 nvme_core.default_ps_max_latency_us=400 quiet splash loglevel=0
[    0.048024] Built 1 zonelists, mobility grouping on.  Total pages: 8103942
[    0.100460] NR_IRQS: 24832, nr_irqs: 1096, preallocated irqs: 16
[    0.102372] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
[    0.224174] smpboot: CPU0: AMD Ryzen 9 5900HS with Radeon Graphics (family: 0x19, model: 0x50, stepping: 0x0)
[    0.230685] pinctrl core: initialized pinctrl subsystem
[    0.238753] ACPI: Skipping parse of AML opcode: OpcodeName unavailable (0x0014)
[    0.238765] ACPI: Skipping parse of AML opcode: OpcodeName unavailable (0x0014)
[    0.249737] ACPI: PCI: Interrupt link LNKA configured for IRQ 0
[    0.249762] ACPI: PCI: Interrupt link LNKB configured for IRQ 0
[    0.249782] ACPI: PCI: Interrupt link LNKC configured for IRQ 0
[    0.249807] ACPI: PCI: Interrupt link LNKD configured for IRQ 0
[    0.249830] ACPI: PCI: Interrupt link LNKE configured for IRQ 0
[    0.249848] ACPI: PCI: Interrupt link LNKF configured for IRQ 0
[    0.249867] ACPI: PCI: Interrupt link LNKG configured for IRQ 0
[    0.249886] ACPI: PCI: Interrupt link LNKH configured for IRQ 0
[    0.251486] PCI: Using ACPI for IRQ routing
[    0.256091] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
[    0.267677] AMD-Vi: Interrupt remapping enabled
[    1.250513] perf/amd_iommu: Detected AMD IOMMU #0 (2 banks, 4 counters/bank).
[    1.251704] amd_gpio AMDI0030:00: Invalid config param 0014
[    1.251728] amd_gpio AMDI0030:00: Invalid config param 0014
[    1.251745] amd_gpio AMDI0030:00: Invalid config param 0014
[    1.251757] amd_gpio AMDI0030:00: Invalid config param 0014
[    1.251769] amd_gpio AMDI0030:00: Invalid config param 0014
[    1.251891] pcieport 0000:00:01.1: PME: Signaling with IRQ 31
[    1.251907] pcieport 0000:00:01.1: pciehp: Slot #0 AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Interlock- NoCompl+ IbPresDis- LLActRep+
[    1.252023] pcieport 0000:00:02.2: PME: Signaling with IRQ 32
[    1.252033] pcieport 0000:00:02.2: pciehp: Slot #0 AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Interlock- NoCompl+ IbPresDis- LLActRep+
[    1.252136] pcieport 0000:00:02.4: PME: Signaling with IRQ 33
[    1.252223] pcieport 0000:00:08.1: PME: Signaling with IRQ 34
[    1.294095] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    1.343202] x86/mm: Checked W+X mappings: passed, no W+X pages found.
[    2.755444] kvm_amd: TSC scaling supported
[    2.755445] kvm_amd: Nested Virtualization enabled
[    2.755446] kvm_amd: Nested Paging enabled
[    2.755448] kvm_amd: Virtual VMLOAD VMSAVE supported
[    2.755449] kvm_amd: Virtual GIF supported
[    2.755449] kvm_amd: LBR virtualization supported
[    3.222195] amd_gpio AMDI0030:00: Invalid config param 0014
[    5.244161] [drm] amdgpu kernel modesetting enabled.
[    5.244176] amdgpu: vga_switcheroo: detected switching method \_SB_.PCI0.GP17.VGA_.ATPX handle
[    5.249529] amdgpu: Virtual CRAT table created for CPU
[    5.249548] amdgpu: Topology: Add CPU node
[    5.250290] amdgpu 0000:04:00.0: enabling device (0006 -> 0007)
[    5.258170] amdgpu 0000:04:00.0: amdgpu: Fetched VBIOS from VFCT
[    5.258173] amdgpu: ATOM BIOS: 113-CEZANNE-018
[    5.325681] amdgpu 0000:04:00.0: vgaarb: deactivate vga console
[    5.325683] amdgpu 0000:04:00.0: amdgpu: Trusted Memory Zone (TMZ) feature enabled
[    5.325693] amdgpu 0000:04:00.0: amdgpu: MODE2 reset
[    5.325762] amdgpu 0000:04:00.0: amdgpu: VRAM: 512M 0x000000F400000000 - 0x000000F41FFFFFFF (512M used)
[    5.325764] amdgpu 0000:04:00.0: amdgpu: GART: 1024M 0x0000000000000000 - 0x000000003FFFFFFF
[    5.325765] amdgpu 0000:04:00.0: amdgpu: AGP: 267419648M 0x000000F800000000 - 0x0000FFFFFFFFFFFF
[    5.325856] [drm] amdgpu: 512M of VRAM memory ready
[    5.325858] [drm] amdgpu: 15752M of GTT memory ready.
[    5.326463] amdgpu 0000:04:00.0: amdgpu: Will use PSP to load VCN firmware
[    6.125929] amdgpu 0000:04:00.0: amdgpu: RAS: optional ras ta ucode is not available
[    6.134520] amdgpu 0000:04:00.0: amdgpu: RAP: optional rap ta ucode is not available
[    6.134522] amdgpu 0000:04:00.0: amdgpu: SECUREDISPLAY: securedisplay ta ucode is not available
[    6.134753] amdgpu 0000:04:00.0: amdgpu: SMU is initialized successfully!
[    6.148794] snd_hda_intel 0000:04:00.1: bound 0000:04:00.0 (ops amdgpu_dm_audio_component_bind_ops [amdgpu])
[    6.249577] kfd kfd: amdgpu: Allocated 3969056 bytes on gart
[    6.249586] kfd kfd: amdgpu: Total number of KFD nodes to be created: 1
[    6.249626] amdgpu: Virtual CRAT table created for GPU
[    6.249782] amdgpu: Topology: Add dGPU node [0x1638:0x1002]
[    6.249783] kfd kfd: amdgpu: added device 1002:1638
[    6.249791] amdgpu 0000:04:00.0: amdgpu: SE 1, SH per SE 1, CU per SH 8, active_cu_number 8
[    6.249850] amdgpu 0000:04:00.0: amdgpu: ring gfx uses VM inv eng 0 on hub 0
[    6.249851] amdgpu 0000:04:00.0: amdgpu: ring gfx_low uses VM inv eng 1 on hub 0
[    6.249852] amdgpu 0000:04:00.0: amdgpu: ring gfx_high uses VM inv eng 4 on hub 0
[    6.249852] amdgpu 0000:04:00.0: amdgpu: ring comp_1.0.0 uses VM inv eng 5 on hub 0
[    6.249853] amdgpu 0000:04:00.0: amdgpu: ring comp_1.1.0 uses VM inv eng 6 on hub 0
[    6.249853] amdgpu 0000:04:00.0: amdgpu: ring comp_1.2.0 uses VM inv eng 7 on hub 0
[    6.249854] amdgpu 0000:04:00.0: amdgpu: ring comp_1.3.0 uses VM inv eng 8 on hub 0
[    6.249854] amdgpu 0000:04:00.0: amdgpu: ring comp_1.0.1 uses VM inv eng 9 on hub 0
[    6.249855] amdgpu 0000:04:00.0: amdgpu: ring comp_1.1.1 uses VM inv eng 10 on hub 0
[    6.249855] amdgpu 0000:04:00.0: amdgpu: ring comp_1.2.1 uses VM inv eng 11 on hub 0
[    6.249856] amdgpu 0000:04:00.0: amdgpu: ring comp_1.3.1 uses VM inv eng 12 on hub 0
[    6.249856] amdgpu 0000:04:00.0: amdgpu: ring kiq_0.2.1.0 uses VM inv eng 13 on hub 0
[    6.249857] amdgpu 0000:04:00.0: amdgpu: ring sdma0 uses VM inv eng 0 on hub 8
[    6.249857] amdgpu 0000:04:00.0: amdgpu: ring vcn_dec uses VM inv eng 1 on hub 8
[    6.249858] amdgpu 0000:04:00.0: amdgpu: ring vcn_enc0 uses VM inv eng 4 on hub 8
[    6.249859] amdgpu 0000:04:00.0: amdgpu: ring vcn_enc1 uses VM inv eng 5 on hub 8
[    6.249859] amdgpu 0000:04:00.0: amdgpu: ring jpeg_dec uses VM inv eng 6 on hub 8
[    6.250898] [drm] Initialized amdgpu 3.54.0 20150101 for 0000:04:00.0 on minor 0
[    6.258589] fbcon: amdgpudrmfb (fb0) is primary device
[    6.284256] amdgpu 0000:04:00.0: [drm] fb0: amdgpudrmfb frame buffer device
[    6.365125] amdgpu 0000:04:00.0: vgaarb: changed VGA decodes: olddecodes=io+mem,decodes=none:owns=none
[ 2685.259356] amdgpu 0000:04:00.0: amdgpu: SMU is resuming...
[ 2685.260228] amdgpu 0000:04:00.0: amdgpu: dpm has been disabled
[ 2685.261918] amdgpu 0000:04:00.0: amdgpu: SMU is resumed successfully!
[ 2685.301290] amdgpu 0000:04:00.0: amdgpu: ring gfx uses VM inv eng 0 on hub 0
[ 2685.301291] amdgpu 0000:04:00.0: amdgpu: ring gfx_low uses VM inv eng 1 on hub 0
[ 2685.301292] amdgpu 0000:04:00.0: amdgpu: ring gfx_high uses VM inv eng 4 on hub 0
[ 2685.301293] amdgpu 0000:04:00.0: amdgpu: ring comp_1.0.0 uses VM inv eng 5 on hub 0
[ 2685.301293] amdgpu 0000:04:00.0: amdgpu: ring comp_1.1.0 uses VM inv eng 6 on hub 0
[ 2685.301294] amdgpu 0000:04:00.0: amdgpu: ring comp_1.2.0 uses VM inv eng 7 on hub 0
[ 2685.301295] amdgpu 0000:04:00.0: amdgpu: ring comp_1.3.0 uses VM inv eng 8 on hub 0
[ 2685.301295] amdgpu 0000:04:00.0: amdgpu: ring comp_1.0.1 uses VM inv eng 9 on hub 0
[ 2685.301296] amdgpu 0000:04:00.0: amdgpu: ring comp_1.1.1 uses VM inv eng 10 on hub 0
[ 2685.301296] amdgpu 0000:04:00.0: amdgpu: ring comp_1.2.1 uses VM inv eng 11 on hub 0
[ 2685.301297] amdgpu 0000:04:00.0: amdgpu: ring comp_1.3.1 uses VM inv eng 12 on hub 0
[ 2685.301297] amdgpu 0000:04:00.0: amdgpu: ring kiq_0.2.1.0 uses VM inv eng 13 on hub 0
[ 2685.301298] amdgpu 0000:04:00.0: amdgpu: ring sdma0 uses VM inv eng 0 on hub 8
[ 2685.301298] amdgpu 0000:04:00.0: amdgpu: ring vcn_dec uses VM inv eng 1 on hub 8
[ 2685.301299] amdgpu 0000:04:00.0: amdgpu: ring vcn_enc0 uses VM inv eng 4 on hub 8
[ 2685.301299] amdgpu 0000:04:00.0: amdgpu: ring vcn_enc1 uses VM inv eng 5 on hub 8
[ 2685.301300] amdgpu 0000:04:00.0: amdgpu: ring jpeg_dec uses VM inv eng 6 on hub 8
[ 2685.361811] Resume caused by IRQ 9, acpi


cat /sys/kernel/debug/gpio 
gpiochip0: GPIOs 512-767, parent: platform/AMDI0030:00, AMDI0030:00:
WAKE_INT_MASTER_REG: 0xff000000
GPIO bank0
gpio      int|active|trigger|S0i3| S3|S4/S5| Z|wake|pull|  orient|       debounce|reg
#0         😛|     ↑|   edge|  ⏰| ⏰|   ⏰|  |    |  ↑ |input  ↑|b (🕑 046875us)|0x15f8e3
#1          ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#2         😷|     ↓|  level|  ⏰| ⏰|   ⏰|  |    |  ↑ |input  ↑|               |0x15eb00
#3          ∅|      |       |    |   |     |  |    |  ↑ |output ↓|               |0x940000
#4          ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#5          ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#6          ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#7          ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#8          ∅|      |       |    |   |     |  |    |  ↑ |output ↓|               |0x940000
#9         😛|     ↓|  level|    |   |     |  |    |  ↑ |input  ↑|               |0x151b00
#10         ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#11         ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#12         ∅|      |       |    |   |     |  |    |  ↑ |output ↓|               |0x940000
#13         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#14         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#15         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#16         ∅|      |       |    |   |     |  |    |  ↑ |output ↑|               |0xd50000
#17         ∅|      |       |    |   |     |  |    |  ↑ |output ↑|               |0xd50000
#18        😛|     ↓|   edge|  ⏰| ⏰|   ⏰|  |    |  ↑ |input  ↑|               |0x15fa00
#19         ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#20         ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#21         ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#22         ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#23         ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#24         ∅|      |       |    |   |     |  |    |  ↑ |output ↓|               |0x940000
#25         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#26         ∅|      |       |    |   |     |  |    |    |output ↑|               |0xc50000
#27         ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#28         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#29         ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#30         ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#31         ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#32         ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x50000
#33         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#34         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#35         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#36         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#37         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#38         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#39         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#40         ∅|      |       |    |   |     |  |    |  ↓ |output ↑|               |0xe50000
#41         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#42         ∅|      |       |    |   |     |  |    |    |output ↓|               |0x840000
#43         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#44        😛|     ↑|   edge|  ⏰| ⏰|     |  |    |    |input  ↓|               |0x7800
#45         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#46         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#47         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#48         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#49         ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x10000
#50         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#51         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#52         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#53         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#54        😷|     ↑|   edge|  ⏰| ⏰|   ⏰|  |    |    |input  ↓|               |0xe800
#55         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#56         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#57         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#58        😛|     ↑|  level|  ⏰| ⏰|   ⏰|  |    |    |input  ↓|               |0xf900
#59        😛|     ↑|  level|  ⏰| ⏰|   ⏰|  |    |    |input  ↓|               |0xf900
#60         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#61         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#62         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
GPIO bank1
gpio      int|active|trigger|S0i3| S3|S4/S5| Z|wake|pull|  orient|       debounce|reg
#64         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#65         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#66         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#67         ∅|      |       |    |   |     |  |    |  ↓ |input  ↓|               |0x240000
#68         ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#69         ∅|      |       |    |   |     |  |    |    |output ↑|               |0xc50000
#70         ∅|      |       |    |   |     |  |    |  ↓ |input  ↓|               |0x240000
#71         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#72         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#73         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#74         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#75         ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x50000
#76         ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#77         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#78         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#79         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#80         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#81         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#82         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#83         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#84         ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#85         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#86         ∅|      |       |    |   |     |  |    |  ↓ |output ↑|               |0xe50000
#87         ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x50000
#88         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#89         ∅|      |       |    |   |     |  |    |    |output ↑|               |0xc50000
#90         ∅|      |       |    |   |     |  |    |    |output ↓|               |0x840000
#91         ∅|      |       |    |   |     |  |    |  ↓ |input  ↓|               |0x240000
#92         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#93         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#94         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#95         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#96         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#97         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#98         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#99         ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#100        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#101        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#102        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#103        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#104        ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x50000
#105        ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x50000
#106        ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x50000
#107        ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x50000
#108        ∅|      |       |    |   |     |  |    |  ↓ |input  ↑|               |0x250000
#109        ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x50000
#110        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#111        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#112        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#113        ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#114        ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#115        ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#116        ∅|      |       |    |   |     |  |    |    |output ↓|               |0x840000
#117        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#118        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#119        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#120        ∅|      |       |    |   |     |  |    |    |output ↓|               |0x840000
#121        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#122        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#123        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#124        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#125        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#126        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#127        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
GPIO bank2
gpio      int|active|trigger|S0i3| S3|S4/S5| Z|wake|pull|  orient|       debounce|reg
#128        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#129        ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#130        ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#131        ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#132        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#133        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#134        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#135        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#136        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#137        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#138        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#139        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#140        ∅|      |       |    |   |     |  |    |  ↓ |input  ↓|               |0x240000
#141        ∅|      |       |    |   |     |  |    |  ↓ |input  ↓|               |0x240000
#142        ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#143        ∅|      |       |    |   |     |  |    |  ↑ |input  ↑|               |0x150000
#144        ∅|      |       |    |   |     |  |    |  ↓ |output ↓|               |0xa40000
#145        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#146        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#147        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#148        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x40000
#149        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#150        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#151        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#152        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#153        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#154        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#155        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#156        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#157        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#158        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#159        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#160        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#161        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#162        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#163        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#164        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#165        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#166        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#167        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#168        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#169        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#170        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#171        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#172        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#173        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#174        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#175        ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x10000
#176        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#177        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#178        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#179        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#180        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#181        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#182        ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x10000
#183        ∅|      |       |    |   |     |  |    |    |input  ↑|               |0x10000
GPIO bank3
gpio      int|active|trigger|S0i3| S3|S4/S5| Z|wake|pull|  orient|       debounce|reg
#192        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#193        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#194        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#195        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#196        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#197        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#198        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#199        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#200        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#201        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#202        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#203        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#204        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#205        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#206        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#207        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#208        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#209        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#210        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#211        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#212        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#213        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#214        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#215        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#216        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#217        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#218        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#219        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#220        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#221        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#222        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0
#223        ∅|      |       |    |   |     |  |    |    |input  ↓|               |0x0

lspci:
lspci
00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Renoir/Cezanne Root Complex
00:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Renoir/Cezanne IOMMU
00:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Renoir PCIe Dummy Host Bridge
00:01.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Renoir PCIe GPP Bridge
00:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Renoir PCIe Dummy Host Bridge
00:02.2 PCI bridge: Advanced Micro Devices, Inc. [AMD] Renoir/Cezanne PCIe GPP Bridge
00:02.4 PCI bridge: Advanced Micro Devices, Inc. [AMD] Renoir/Cezanne PCIe GPP Bridge
00:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Renoir PCIe Dummy Host Bridge
00:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Renoir Internal PCIe GPP Bridge to Bus
00:14.0 SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 51)
00:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)
00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Cezanne Data Fabric; Function 0
00:18.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Cezanne Data Fabric; Function 1
00:18.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Cezanne Data Fabric; Function 2
00:18.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Cezanne Data Fabric; Function 3
00:18.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Cezanne Data Fabric; Function 4
00:18.5 Host bridge: Advanced Micro Devices, Inc. [AMD] Cezanne Data Fabric; Function 5
00:18.6 Host bridge: Advanced Micro Devices, Inc. [AMD] Cezanne Data Fabric; Function 6
00:18.7 Host bridge: Advanced Micro Devices, Inc. [AMD] Cezanne Data Fabric; Function 7
01:00.0 VGA compatible controller: NVIDIA Corporation GA106M [GeForce RTX 3060 Mobile / Max-Q] (rev a1)
01:00.1 Audio device: NVIDIA Corporation GA106 High Definition Audio Controller (rev a1)
02:00.0 Network controller: MEDIATEK Corp. MT7921 802.11ax PCI Express Wireless Network Adapter
03:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller PM9A1/PM9A3/980PRO
04:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Cezanne [Radeon Vega Series / Radeon Vega Mobile Series] (rev c4)
04:00.1 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] Renoir Radeon High Definition Audio Controller
04:00.2 Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 10h-1fh) Platform Security Processor
04:00.3 USB controller: Advanced Micro Devices, Inc. [AMD] Renoir/Cezanne USB 3.1
04:00.4 USB controller: Advanced Micro Devices, Inc. [AMD] Renoir/Cezanne USB 3.1
04:00.5 Multimedia controller: Advanced Micro Devices, Inc. [AMD] ACP/ACP3X/ACP6x Audio Coprocessor (rev 01)
04:00.6 Audio device: Advanced Micro Devices, Inc. [AMD] Family 17h/19h HD Audio Controller
Comment 1 sander44 2023-07-22 17:22:09 UTC 
Created attachment 304685 [details]
gpio.txt
Comment 2 Michele Della Guardia 2023-07-24 13:53:19 UTC 
Same behaviour here with kernel 6.4.5 while no issues on 6.4.4
Comment 3 Mario Limonciello (AMD) 2023-07-24 16:08:43 UTC 
It's fixed with this change:
https://lore.kernel.org/linux-gpio/20230717201652.17168-1-mario.limonciello@amd.com/#t
Comment 5 Michele Della Guardia 2023-07-27 10:25:03 UTC 
I just patched kernel 6.4.7 and I confirm that the fix works.