Bug 207685
Summary: | [ARM64] different CPU L3 cache size reported by /sys/device/ and dmidecode | ||
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Product: | ACPI | Reporter: | Aaron Chou (zhoubb.aaron) |
Component: | Config-Processors | Assignee: | acpi_config-processors |
Status: | RESOLVED WILL_NOT_FIX | ||
Severity: | normal | ||
Priority: | P1 | ||
Hardware: | ARM | ||
OS: | Linux | ||
Kernel Version: | 4.19.90 | Subsystem: | |
Regression: | No | Bisected commit-id: |
Description
Aaron Chou
2020-05-11 06:54:03 UTC
ACPI reads these cache information from PPTT. The firmware which populates the ACPI PPTT must read it from DMI entries and keep them in sync. On this system, looks like the firmware tried to be more imaginative and populated PPTT with wrong values. Get that firmware fixed please! Answered by Sudeep Holla! |