Bug 15348

Created attachment 25111 [details]
A dirty hack for Intel Core i3 i5 PentiumG6950 Clarkdale CPUs (TJMax = 105)

It seems like the aforementioned CPUs have 105 TJMax temperature.

I have a Core i3 330M. /proc/cpuinfo is below:

processor	: 0
vendor_id	: GenuineIntel
cpu family	: 6
model		: 37
model name	: Intel(R) Core(TM) i3 CPU       M 330  @ 2.13GHz
stepping	: 2
cpu MHz		: 933.000
cache size	: 3072 KB
physical id	: 0
siblings	: 4
core id		: 0
cpu cores	: 2
apicid		: 0
initial apicid	: 0
fdiv_bug	: no
hlt_bug		: no
f00f_bug	: no
coma_bug	: no
fpu		: yes
fpu_exception	: yes
cpuid level	: 11
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx rdtscp lm constant_tsc arch_perfmon pebs bts xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt lahf_lm arat tpr_shadow vnmi flexpriority ept vpid
bogomips	: 4258.95
clflush size	: 64
cache_alignment	: 64
address sizes	: 36 bits physical, 48 bits virtual
power management:

Coretemp outputs two temperatures for each physical core when the Hyper-Threading Technology is enabled. 

We are trying to figure out another method to support the CPUs due to more and more CPUs will supported by coretemp and TjMax is different for each series. 

Thanks for the patches. Please stay tuned.

re-assign to hwmon category.

Same issue here:

ASUS P7P55D EVO motherboard with Intel i3 540.

System monitor reports 4 CPUs.

Sensors-detect (latest script) gives:
---------------------------
Driver `to-be-written':
  * ISA bus, address 0x290
    Chip `Nuvoton W83667HG-B Super IO Sensors' (confidence: 9)
---------------------------
O/S is Ubuntu 9.1, Linux 2.6.31-19-generic

lspci output, if it helps:

00:00.0 Host bridge: Intel Corporation Clarkdake DRAM Controller (rev 12)
00:01.0 PCI bridge: Intel Corporation Clarkdale PCI Express x16 Root Port (rev 12)
00:1a.0 USB Controller: Intel Corporation 5 Series/3400 Series Chipset USB2 Enhanced Host Controller (rev 05)
00:1b.0 Audio device: Intel Corporation 5 Series/3400 Series Chipset High Definition Audio (rev 05)
00:1c.0 PCI bridge: Intel Corporation 5 Series/3400 Series Chipset PCI Express Root Port 1 (rev 05)
00:1c.4 PCI bridge: Intel Corporation 5 Series/3400 Series Chipset PCI Express Root Port 5 (rev 05)
00:1c.5 PCI bridge: Intel Corporation 5 Series/3400 Series Chipset PCI Express Root Port 6 (rev 05)
00:1c.6 PCI bridge: Intel Corporation 5 Series/3400 Series Chipset PCI Express Root Port 7 (rev 05)
00:1c.7 PCI bridge: Intel Corporation 5 Series/3400 Series Chipset PCI Express Root Port 8 (rev 05)
00:1d.0 USB Controller: Intel Corporation 5 Series/3400 Series Chipset USB2 Enhanced Host Controller (rev 05)
00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev a5)
00:1f.0 ISA bridge: Intel Corporation 5 Series Chipset LPC Interface Controller (rev 05)
00:1f.2 IDE interface: Intel Corporation 5 Series/3400 Series Chipset 4 port SATA IDE Controller (rev 05)
00:1f.3 SMBus: Intel Corporation 5 Series/3400 Series Chipset SMBus Controller (rev 05)
00:1f.5 IDE interface: Intel Corporation 5 Series/3400 Series Chipset 2 port SATA IDE Controller (rev 05)
01:00.0 VGA compatible controller: nVidia Corporation G92 [GeForce GTS 250] (rev a2)
02:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller (rev 03)
03:00.0 SATA controller: JMicron Technology Corp. JMB362/JMB363 AHCI Controller (rev 03)
03:00.1 IDE interface: JMicron Technology Corp. JMB362/JMB363 AHCI Controller (rev 03)
07:03.0 FireWire (IEEE 1394): VIA Technologies, Inc. VT6306 Fire II IEEE 1394 OHCI Link Layer Controller (rev c0)
07:04.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8110SC/8169SC Gigabit Ethernet (rev 10)

Same here with a Core i7 920.

> Coretemp outputs two temperatures for each physical core when the
> Hyper-Threading Technology is enabled. 
Is the affinity dynamic and rndom or can one tell which virtual values correspont to which physical core?

Since no one comes up with a better (read any) patch and 2.6.34 is near, can my fix be merged as is? It's pretty straightforward and it works.

God, why does this patch ( http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=5db47b009d17d69a2f8d84357e7b24c3e3c2edec ) assume there's no c->x86_model=0x25 CPU family?

(In reply to comment #8)
> God, why does this patch (
>
> http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=5db47b009d17d69a2f8d84357e7b24c3e3c2edec
> ) assume there's no c->x86_model=0x25 CPU family?

Could you test the path first? If there are any problems, patches are welcomed to lm-sensors or LKML.

Resolved in 2.6.35.

I can confirm the coretemp module loads successfully with 2.6.35 rc3. I have Core i3 330M (See comment #3).