---Check S2idle path S0ix Residency---: The system OS Kernel version is: Linux MME.lan 6.7.3-2.gce5575e-vanilla #1 SMP PREEMPT_DYNAMIC Fri Feb 2 09:02:43 UTC 2024 (ce5575e) x86_64 x86_64 x86_64 GNU/Linux ---Check whether your system supports S0ix or not---: Low Power S0 Idle is:1 Your system supports low power S0 idle capability. ---Check whether intel_pmc_core sysfs files exit---: The pmc_core debug sysfs files are OK on your system. ---Judge PC10, S0ix residency available status---: Test system supports S0ix.y substate S0ix substate before S2idle: S0i2.0 S0i3.0 S0ix substate residency before S2idle: 0 0 Turbostat output: 16.644663 sec CPU%c1 CPU%c6 CPU%c7 Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 Pkg%pc8 Pkg%pc9 Pk%pc10 SYS%LPI 1.49 0.00 97.26 4.02 1.50 0.02 0.52 0.43 1.37 84.44 0.00 1.00 0.00 97.88 4.02 1.50 0.02 0.52 0.43 1.37 84.44 0.00 1.27 1.25 0.00 97.69 1.65 0.99 0.00 98.04 1.09 3.12 0.00 95.42 1.57 CPU Core C7 residency after S2idle is: 97.26 GFX RC6 residency after S2idle is: CPU Package C-state 2 residency after S2idle is: 4.02 CPU Package C-state 3 residency after S2idle is: 1.50 CPU Package C-state 8 residency after S2idle is: 0.43 CPU Package C-state 9 residency after S2idle is: 1.37 CPU Package C-state 10 residency after S2idle is: 84.44 S0ix residency after S2idle is: 0.00 Your system supports S0ix substates, but did not achieve the shallowest s0i2.0 Here is the S0ix substates status: Substate Residency S0i2.0 0 S0i3.0 0 ---Debug s0i2.0 substate failure scenario---: ---Begin S0ix Substate Debug by substate_requirements---: Clear lpm_latch_mode is Done Set c10 to lpm_latch_mode is Done Need to run once S2idle, please wait for 15 seconds... substate_requirements file shows: Element S0i2.0 Status USB2PLL_OFF_STS Required Yes PCIe/USB3.1_Gen2PLL_OFF_STS Required Yes PCIe_Gen3PLL_OFF_STS Required Yes OPIOPLL_OFF_STS Required Yes OCPLL_OFF_STS Required Yes MainPLL_OFF_STS MIPIPLL_OFF_STS Required Yes Fast_XTAL_Osc_OFF_STS AC_Ring_Osc_OFF_STS Required Yes SATAPLL_OFF_STS Required Yes XTAL_USB2PLL_OFF_STS Yes CSME_PG_STS Required Yes SATA_PG_STS Required Yes xHCI_PG_STS Required Yes UFSX2_PG_STS Required Yes OTG_PG_STS Required Yes SPA_PG_STS Required Yes SPB_PG_STS Required Yes SPC_PG_STS Required Yes THC0_PG_STS Required Yes THC1_PG_STS Required Yes GBETSN_PG_STS Required Yes GBE_PG_STS Required Yes LPSS_PG_STS Required Yes ADSP_D3_STS Yes xHCI0_D3_STS Required Yes xDCI1_D3_STS Required Yes IS_D3_STS Required Yes GBE_TSN_D3_STS Required Yes CPU_C10_REQ_STS_0 Required Yes CNVI_REQ_STS_6 Yes ISH_REQ_STS_7 MPHY_Core_DL_REQ_STS_16 Required Yes Break-even_En_REQ_STS_17 Required Yes Auto-demo_En_REQ_STS_18 Required Yes Did not detect the potential blockers from substate_requirements, need to check substate_status_registers file for the advanced debug. substate_status_registers: PMC0:LPM_STATUS_0: 0xf57c00f4 PMC0:USB2PLL_OFF_STS 1 PMC0:PCIe/USB3.1_Gen2PLL_OFF_STS 1 PMC0:PCIe_Gen3PLL_OFF_STS 1 PMC0:OPIOPLL_OFF_STS 1 PMC0:OCPLL_OFF_STS 1 PMC0:MainPLL_OFF_STS 0 PMC0:MIPIPLL_OFF_STS 1 PMC0:Fast_XTAL_Osc_OFF_STS 0 PMC0:AC_Ring_Osc_OFF_STS 1 PMC0:MC_Ring_Osc_OFF_STS 0 PMC0:SATAPLL_OFF_STS 1 PMC0:XTAL_USB2PLL_OFF_STS 1 PMC0:LPM_STATUS_1: 0xe47ee3ef PMC0:CSME_PG_STS 1 PMC0:SATA_PG_STS 1 PMC0:xHCI_PG_STS 1 PMC0:UFSX2_PG_STS 1 PMC0:OTG_PG_STS 1 PMC0:SPA_PG_STS 1 PMC0:SPB_PG_STS 1 PMC0:SPC_PG_STS 1 PMC0:SPD_PG_STS 1 PMC0:SPE_PG_STS 0 PMC0:SPF_PG_STS 0 PMC0:LSX_PG_STS 1 PMC0:P2SB_PG_STS 1 PMC0:PSF_PG_STS 1 PMC0:SBR_PG_STS 0 PMC0:OPIDMI_PG_STS 1 PMC0:THC0_PG_STS 1 PMC0:THC1_PG_STS 1 PMC0:GBETSN_PG_STS 1 PMC0:GBE_PG_STS 1 PMC0:LPSS_PG_STS 1 PMC0:MMP_UFSX2_PG_STS 0 PMC0:MMP_UFSX2B_PG_STS 0 PMC0:FIA_PG_STS 0 PMC0:LPM_STATUS_2: 0x1fef PMC0:ADSP_D3_STS 1 PMC0:SATA_D3_STS 1 PMC0:xHCI0_D3_STS 1 PMC0:xDCI1_D3_STS 1 PMC0:SDX_D3_STS 1 PMC0:EMMC_D3_STS 1 PMC0:IS_D3_STS 1 PMC0:THC0_D3_STS 1 PMC0:THC1_D3_STS 1 PMC0:GBE_D3_STS 1 PMC0:GBE_TSN_D3_STS 1 PMC0:LPM_STATUS_3: 0x1000 PMC0:GPIO_COM0_VNN_REQ_STS 0 PMC0:GPIO_COM1_VNN_REQ_STS 0 PMC0:GPIO_COM2_VNN_REQ_STS 0 PMC0:GPIO_COM3_VNN_REQ_STS 0 PMC0:GPIO_COM4_VNN_REQ_STS 0 PMC0:GPIO_COM5_VNN_REQ_STS 0 PMC0:Audio_VNN_REQ_STS 0 PMC0:ISH_VNN_REQ_STS 0 PMC0:CNVI_VNN_REQ_STS 0 PMC0:eSPI_VNN_REQ_STS 0 PMC0:Display_VNN_REQ_STS 0 PMC0:DTS_VNN_REQ_STS 1 PMC0:SMBUS_VNN_REQ_STS 0 PMC0:CSME_VNN_REQ_STS 0 PMC0:SMLINK0_VNN_REQ_STS 0 PMC0:SMLINK1_VNN_REQ_STS 0 PMC0:CLINK_VNN_REQ_STS 0 PMC0:DCI_VNN_REQ_STS 0 PMC0:ITH_VNN_REQ_STS 0 PMC0:CSME_VNN_REQ_STS 0 PMC0:GBE_VNN_REQ_STS 0 PMC0:LPM_STATUS_4: 0x3d17fe65 PMC0:CPU_C10_REQ_STS_0 1 PMC0:PCIe_LPM_En_REQ_STS_3 0 PMC0:ITH_REQ_STS_5 1 PMC0:CNVI_REQ_STS_6 1 PMC0:ISH_REQ_STS_7 0 PMC0:USB2_SUS_PG_Sys_REQ_STS_10 1 PMC0:PCIe_Clk_REQ_STS_12 1 PMC0:MPHY_Core_DL_REQ_STS_16 1 PMC0:Break-even_En_REQ_STS_17 1 PMC0:Auto-demo_En_REQ_STS_18 1 PMC0:MPHY_SUS_REQ_STS_22 0 PMC0:xDCI_attached_REQ_STS_24 1 PMC0:LPM_STATUS_5: 0xaaaaa PMC0:LSX_Wake0_En_STS 0 PMC0:LSX_Wake0_Pol_STS 1 PMC0:LSX_Wake1_En_STS 0 PMC0:LSX_Wake1_Pol_STS 1 PMC0:LSX_Wake2_En_STS 0 PMC0:LSX_Wake2_Pol_STS 1 PMC0:LSX_Wake3_En_STS 0 PMC0:LSX_Wake3_Pol_STS 1 PMC0:LSX_Wake4_En_STS 0 PMC0:LSX_Wake4_Pol_STS 1 PMC0:LSX_Wake5_En_STS 0 PMC0:LSX_Wake5_Pol_STS 1 PMC0:LSX_Wake6_En_STS 0 PMC0:LSX_Wake6_Pol_STS 1 PMC0:LSX_Wake7_En_STS 0 PMC0:LSX_Wake7_Pol_STS 1 PMC0:Intel_Se_IO_Wake0_En_STS 0 PMC0:Intel_Se_IO_Wake0_Pol_STS 1 PMC0:Intel_Se_IO_Wake1_En_STS 0 PMC0:Intel_Se_IO_Wake1_Pol_STS 1 PMC0:Int_Timer_SS_Wake0_En_STS 0 PMC0:Int_Timer_SS_Wake0_Pol_STS 0 PMC0:Int_Timer_SS_Wake1_En_STS 0 PMC0:Int_Timer_SS_Wake1_Pol_STS 0 PMC0:Int_Timer_SS_Wake2_En_STS 0 PMC0:Int_Timer_SS_Wake2_Pol_STS 0 PMC0:Int_Timer_SS_Wake3_En_STS 0 PMC0:Int_Timer_SS_Wake3_Pol_STS 0 PMC0:Int_Timer_SS_Wake4_En_STS 0 PMC0:Int_Timer_SS_Wake4_Pol_STS 0 PMC0:Int_Timer_SS_Wake5_En_STS 0 PMC0:Int_Timer_SS_Wake5_Pol_STS 0 Your system south port controller power gating state is OK after 30 seconds runtime check.