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Lines 1578-1583
static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
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| 1578 |
bool need_valid_mask = !dmi_check_system(chv_no_valid_mask); |
1578 |
bool need_valid_mask = !dmi_check_system(chv_no_valid_mask); |
| 1579 |
int ret, i, offset; |
1579 |
int ret, i, offset; |
| 1580 |
int irq_base; |
1580 |
int irq_base; |
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1581 |
u32 intmask; |
| 1581 |
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1582 |
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| 1582 |
*chip = chv_gpio_chip; |
1583 |
*chip = chv_gpio_chip; |
| 1583 |
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1584 |
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Lines 1605-1614
static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
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| 1605 |
offset += range->npins; |
1606 |
offset += range->npins; |
| 1606 |
} |
1607 |
} |
| 1607 |
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1608 |
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| 1608 |
/* Do not add GPIOs that can only generate GPEs to the IRQ domain */ |
1609 |
intmask = readl(pctrl->regs + CHV_INTMASK); |
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1610 |
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| 1609 |
for (i = 0; i < pctrl->community->npins; i++) { |
1611 |
for (i = 0; i < pctrl->community->npins; i++) { |
| 1610 |
const struct pinctrl_pin_desc *desc; |
1612 |
const struct pinctrl_pin_desc *desc; |
| 1611 |
u32 intsel; |
1613 |
u32 intsel; |
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1614 |
u32 intcfg; |
| 1612 |
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1615 |
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| 1613 |
desc = &pctrl->community->pins[i]; |
1616 |
desc = &pctrl->community->pins[i]; |
| 1614 |
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1617 |
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Lines 1616-1625
static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
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| 1616 |
intsel &= CHV_PADCTRL0_INTSEL_MASK; |
1619 |
intsel &= CHV_PADCTRL0_INTSEL_MASK; |
| 1617 |
intsel >>= CHV_PADCTRL0_INTSEL_SHIFT; |
1620 |
intsel >>= CHV_PADCTRL0_INTSEL_SHIFT; |
| 1618 |
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1621 |
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1622 |
/* |
| 1623 |
* Do not add GPIOs that can only generate GPEs |
| 1624 |
* to the IRQ domain. |
| 1625 |
*/ |
| 1619 |
if (need_valid_mask && intsel >= pctrl->community->nirqs) |
1626 |
if (need_valid_mask && intsel >= pctrl->community->nirqs) |
| 1620 |
clear_bit(i, chip->irq_valid_mask); |
1627 |
clear_bit(i, chip->irq_valid_mask); |
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1628 |
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| 1629 |
/* |
| 1630 |
* Also make sure pins that are not configured as interrupts |
| 1631 |
* are masked, or we'll get an interrupt storm. |
| 1632 |
*/ |
| 1633 |
if ((intmask & BIT(intsel)) && |
| 1634 |
!(intcfg & CHV_PADCTRL1_INTWAKECFG_MASK)) { |
| 1635 |
dev_dbg(pctrl->dev, |
| 1636 |
"%s: pin %d is not configured as interrupt, resetting interrupt mask\n", |
| 1637 |
__func__, desc->number); |
| 1638 |
intmask &= ~BIT(intsel); |
| 1639 |
} |
| 1621 |
} |
1640 |
} |
| 1622 |
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1641 |
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1642 |
chv_writel(intmask, pctrl->regs + CHV_INTMASK); |
| 1643 |
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| 1623 |
/* Clear all interrupts */ |
1644 |
/* Clear all interrupts */ |
| 1624 |
chv_writel(0xffff, pctrl->regs + CHV_INTSTAT); |
1645 |
chv_writel(0xffff, pctrl->regs + CHV_INTSTAT); |
| 1625 |
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1646 |
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