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Lines 903-908
static void vgpu_write##x(struct drm_i915_private *dev_priv, \
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| 903 |
GEN6_WRITE_FOOTER; \ |
903 |
GEN6_WRITE_FOOTER; \ |
| 904 |
} |
904 |
} |
| 905 |
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905 |
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906 |
#define __vlv_write(x) \ |
| 907 |
static void \ |
| 908 |
vlv_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \ |
| 909 |
enum forcewake_domains fw_engine = 0; \ |
| 910 |
GEN6_WRITE_HEADER; \ |
| 911 |
if (!NEEDS_FORCE_WAKE((dev_priv), (reg))) \ |
| 912 |
fw_engine = 0; \ |
| 913 |
else if (FORCEWAKE_VLV_RENDER_RANGE_OFFSET(reg)) \ |
| 914 |
fw_engine = FORCEWAKE_RENDER; \ |
| 915 |
else if (FORCEWAKE_VLV_MEDIA_RANGE_OFFSET(reg)) \ |
| 916 |
fw_engine = FORCEWAKE_MEDIA; \ |
| 917 |
if (fw_engine) \ |
| 918 |
__force_wake_get(dev_priv, fw_engine); \ |
| 919 |
__raw_i915_write##x(dev_priv, reg, val); \ |
| 920 |
GEN6_WRITE_FOOTER; \ |
| 921 |
} |
| 922 |
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| 906 |
static const u32 gen8_shadowed_regs[] = { |
923 |
static const u32 gen8_shadowed_regs[] = { |
| 907 |
FORCEWAKE_MT, |
924 |
FORCEWAKE_MT, |
| 908 |
GEN6_RPNSWREQ, |
925 |
GEN6_RPNSWREQ, |
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Lines 1012-1017
__gen8_write(8)
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| 1012 |
__gen8_write(16) |
1029 |
__gen8_write(16) |
| 1013 |
__gen8_write(32) |
1030 |
__gen8_write(32) |
| 1014 |
__gen8_write(64) |
1031 |
__gen8_write(64) |
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1032 |
__vlv_write(8) |
| 1033 |
__vlv_write(16) |
| 1034 |
__vlv_write(32) |
| 1035 |
__vlv_write(64) |
| 1015 |
__hsw_write(8) |
1036 |
__hsw_write(8) |
| 1016 |
__hsw_write(16) |
1037 |
__hsw_write(16) |
| 1017 |
__hsw_write(32) |
1038 |
__hsw_write(32) |
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Lines 1028-1033
__vgpu_write(64)
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| 1028 |
#undef __gen9_write |
1049 |
#undef __gen9_write |
| 1029 |
#undef __chv_write |
1050 |
#undef __chv_write |
| 1030 |
#undef __gen8_write |
1051 |
#undef __gen8_write |
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1052 |
#undef __vlv_write |
| 1031 |
#undef __hsw_write |
1053 |
#undef __hsw_write |
| 1032 |
#undef __gen6_write |
1054 |
#undef __gen6_write |
| 1033 |
#undef __vgpu_write |
1055 |
#undef __vgpu_write |
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Lines 1218-1223
void intel_uncore_init(struct drm_device *dev)
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| 1218 |
case 6: |
1240 |
case 6: |
| 1219 |
if (IS_HASWELL(dev)) { |
1241 |
if (IS_HASWELL(dev)) { |
| 1220 |
ASSIGN_WRITE_MMIO_VFUNCS(hsw); |
1242 |
ASSIGN_WRITE_MMIO_VFUNCS(hsw); |
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1243 |
} else if (IS_VALLEYVIEW(dev)) { |
| 1244 |
ASSIGN_WRITE_MMIO_VFUNCS(vlv); |
| 1221 |
} else { |
1245 |
} else { |
| 1222 |
ASSIGN_WRITE_MMIO_VFUNCS(gen6); |
1246 |
ASSIGN_WRITE_MMIO_VFUNCS(gen6); |
| 1223 |
} |
1247 |
} |
| 1224 |
- |
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