Lines 295-301
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295 |
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295 |
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296 |
static unsigned long hpt370a_filter(struct ata_device *adev, unsigned long mask) |
296 |
static unsigned long hpt370a_filter(struct ata_device *adev, unsigned long mask) |
297 |
{ |
297 |
{ |
298 |
if (adev->class != ATA_DEV_ATA) { |
298 |
if (adev->class == ATA_DEV_ATA) { |
299 |
if (hpt_dma_blacklisted(adev, "UDMA100", bad_ata100_5)) |
299 |
if (hpt_dma_blacklisted(adev, "UDMA100", bad_ata100_5)) |
300 |
mask &= ~ (0x1F << ATA_SHIFT_UDMA); |
300 |
mask &= ~ (0x1F << ATA_SHIFT_UDMA); |
301 |
} |
301 |
} |
Lines 359-386
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359 |
{ 0x50, 1, 0x04, 0x04 }, |
359 |
{ 0x50, 1, 0x04, 0x04 }, |
360 |
{ 0x54, 1, 0x04, 0x04 } |
360 |
{ 0x54, 1, 0x04, 0x04 } |
361 |
}; |
361 |
}; |
362 |
u16 mcr3, mcr6; |
362 |
u16 mcr3; |
363 |
u8 ata66; |
363 |
u8 ata66; |
364 |
struct ata_port *ap = link->ap; |
364 |
struct ata_port *ap = link->ap; |
365 |
struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
365 |
struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
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366 |
unsigned int mcrbase = 0x50 + 4 * ap->port_no; |
366 |
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367 |
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367 |
if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no])) |
368 |
if (!pci_test_config_bits(pdev, &hpt37x_enable_bits[ap->port_no])) |
368 |
return -ENOENT; |
369 |
return -ENOENT; |
369 |
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370 |
|
370 |
/* Do the extra channel work */ |
371 |
/* Do the extra channel work */ |
371 |
pci_read_config_word(pdev, 0x52, &mcr3); |
372 |
pci_read_config_word(pdev, mcrbase + 2, &mcr3); |
372 |
pci_read_config_word(pdev, 0x56, &mcr6); |
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|
373 |
/* Set bit 15 of 0x52 to enable TCBLID as input |
373 |
/* Set bit 15 of 0x52 to enable TCBLID as input |
374 |
Set bit 15 of 0x56 to enable FCBLID as input |
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375 |
*/ |
374 |
*/ |
376 |
pci_write_config_word(pdev, 0x52, mcr3 | 0x8000); |
375 |
pci_write_config_word(pdev, mcrbase + 2, mcr3 | 0x8000); |
377 |
pci_write_config_word(pdev, 0x56, mcr6 | 0x8000); |
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378 |
pci_read_config_byte(pdev, 0x5A, &ata66); |
376 |
pci_read_config_byte(pdev, 0x5A, &ata66); |
379 |
/* Reset TCBLID/FCBLID to output */ |
377 |
/* Reset TCBLID/FCBLID to output */ |
380 |
pci_write_config_word(pdev, 0x52, mcr3); |
378 |
pci_write_config_word(pdev, 0x52, mcr3); |
381 |
pci_write_config_word(pdev, 0x56, mcr6); |
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382 |
|
379 |
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383 |
if (ata66 & (1 << ap->port_no)) |
380 |
if (ata66 & (2 >> ap->port_no)) |
384 |
ap->cbl = ATA_CBL_PATA40; |
381 |
ap->cbl = ATA_CBL_PATA40; |
385 |
else |
382 |
else |
386 |
ap->cbl = ATA_CBL_PATA80; |
383 |
ap->cbl = ATA_CBL_PATA80; |
Lines 844-849
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844 |
/* Never went stable */ |
841 |
/* Never went stable */ |
845 |
return 0; |
842 |
return 0; |
846 |
} |
843 |
} |
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844 |
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845 |
static u32 hpt374_read_freq(struct pci_dev *pdev) |
846 |
{ |
847 |
u32 freq; |
848 |
unsigned long io_base = pci_resource_start(pdev, 4); |
849 |
if (PCI_FUNC(pdev->devfn) & 1) { |
850 |
struct pci_dev *pdev_0 = pci_get_slot(pdev->bus, pdev->devfn - 1); |
851 |
io_base = pci_resource_start(pdev_0, 4); |
852 |
freq = inl(io_base + 0x90); |
853 |
pci_dev_put(pdev_0); |
854 |
} |
855 |
else |
856 |
freq = inl(io_base + 0x90); |
857 |
return freq; |
858 |
} |
859 |
|
847 |
/** |
860 |
/** |
848 |
* hpt37x_init_one - Initialise an HPT37X/302 |
861 |
* hpt37x_init_one - Initialise an HPT37X/302 |
849 |
* @dev: PCI device |
862 |
* @dev: PCI device |
Lines 902-908
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902 |
.flags = ATA_FLAG_SLAVE_POSS, |
915 |
.flags = ATA_FLAG_SLAVE_POSS, |
903 |
.pio_mask = 0x1f, |
916 |
.pio_mask = 0x1f, |
904 |
.mwdma_mask = 0x07, |
917 |
.mwdma_mask = 0x07, |
905 |
.udma_mask = 0x0f, |
918 |
.udma_mask = ATA_UDMA5, |
906 |
.port_ops = &hpt370_port_ops |
919 |
.port_ops = &hpt370_port_ops |
907 |
}; |
920 |
}; |
908 |
/* HPT370A - UDMA100 */ |
921 |
/* HPT370A - UDMA100 */ |
Lines 911-917
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911 |
.flags = ATA_FLAG_SLAVE_POSS, |
924 |
.flags = ATA_FLAG_SLAVE_POSS, |
912 |
.pio_mask = 0x1f, |
925 |
.pio_mask = 0x1f, |
913 |
.mwdma_mask = 0x07, |
926 |
.mwdma_mask = 0x07, |
914 |
.udma_mask = 0x0f, |
927 |
.udma_mask = ATA_UDMA5, |
915 |
.port_ops = &hpt370a_port_ops |
928 |
.port_ops = &hpt370a_port_ops |
916 |
}; |
929 |
}; |
917 |
/* HPT371, 372 and friends - UDMA133 */ |
930 |
/* HPT371, 372 and friends - UDMA133 */ |
Lines 1047-1055
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1047 |
outb(0x0e, iobase + 0x9c); |
1060 |
outb(0x0e, iobase + 0x9c); |
1048 |
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1061 |
|
1049 |
/* Some devices do not let this value be accessed via PCI space |
1062 |
/* Some devices do not let this value be accessed via PCI space |
1050 |
according to the old driver */ |
1063 |
according to the old driver. In addition we must use the value |
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1064 |
from FN 0 on the HPT374 */ |
1065 |
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1066 |
if (chip_table == &hpt374) |
1067 |
freq = hpt374_read_freq(dev); |
1068 |
else |
1069 |
freq = inl(iobase + 0x90); |
1051 |
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1070 |
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1052 |
freq = inl(iobase + 0x90); |
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1053 |
if ((freq >> 12) != 0xABCDE) { |
1071 |
if ((freq >> 12) != 0xABCDE) { |
1054 |
int i; |
1072 |
int i; |
1055 |
u8 sr; |
1073 |
u8 sr; |