Bug 7627 - realtek r8169 performance decreased on 2.6.19
Summary: realtek r8169 performance decreased on 2.6.19
Status: CLOSED CODE_FIX
Alias: None
Product: Drivers
Classification: Unclassified
Component: Network (show other bugs)
Hardware: i386 Linux
: P2 normal
Assignee: Francois Romieu
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2006-12-03 10:29 UTC by Hugues Freville
Modified: 2007-01-01 14:02 UTC (History)
1 user (show)

See Also:
Kernel Version: 2.6.19
Subsystem:
Regression: ---
Bisected commit-id:


Attachments
r8169 changes from 2.6.18.3 to 2.6.19 (19.01 KB, patch)
2006-12-03 15:12 UTC, Francois Romieu
Details | Diff
little patch re-sending TxEnb/RxEnb first (740 bytes, patch)
2006-12-12 18:14 UTC, Hugues Freville
Details | Diff
Typo: device enable registers must not be accessed twice (461 bytes, patch)
2006-12-17 14:47 UTC, Francois Romieu
Details | Diff

Description Hugues Freville 2006-12-03 10:29:04 UTC
Most recent kernel where this bug did *NOT* occur: 2.6.18.3
Distribution: Debian Etch with vanilla kernel
Hardware Environment: Athlon64 with nforce430 chipset and realtek pci
network card.
lspci -n  for realtek card : 01:06.0 0200: 10ec:8169 (rev 10)
Software Environment: Debian Etch for amd64

Problem Description:
Upgrading from 2.6.18.3 to 2.6.19 i noticed decreased performance of my realtek
network card

I make tests with iperf over tcp and udp
vanilla 2.6.18.3  				give me 650Mbps
vanilla 2.6.19  				give me 280Mbps

The problem is related to the new r8169.c version, 
using a 2.6.18.3 with r8169.c patched to 2.6.19 version give me 
the same problem (more details:
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=400524)

vanilla 2.6.18.3 + r8169 from 2.6.19  		give me 280Mbps


Steps to reproduce:
 - build and boot with 2.6.18.3, see that you get 650Mbps
 - build and boot with 2.6.19, see that you get 280Mbps


More Informations :

motherboard is : GA-K8N51GMF-9

full lspci : 
00:00.0 RAM memory: nVidia Corporation C51 Host Bridge (rev a2)
00:00.1 RAM memory: nVidia Corporation C51 Memory Controller 0 (rev a2)
00:00.2 RAM memory: nVidia Corporation C51 Memory Controller 1 (rev a2)
00:00.3 RAM memory: nVidia Corporation C51 Memory Controller 5 (rev a2)
00:00.4 RAM memory: nVidia Corporation C51 Memory Controller 4 (rev a2)
00:00.5 RAM memory: nVidia Corporation C51 Host Bridge (rev a2)
00:00.6 RAM memory: nVidia Corporation C51 Memory Controller 3 (rev a2)
00:00.7 RAM memory: nVidia Corporation C51 Memory Controller 2 (rev a2)
00:02.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1)
00:03.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1)
00:04.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1)
00:05.0 VGA compatible controller: nVidia Corporation C51G [GeForce
6100] (rev a2)
00:09.0 RAM memory: nVidia Corporation MCP51 Host Bridge (rev a2)
00:0a.0 ISA bridge: nVidia Corporation MCP51 LPC Bridge (rev a2)
00:0a.1 SMBus: nVidia Corporation MCP51 SMBus (rev a2)
00:0a.2 RAM memory: nVidia Corporation MCP51 Memory Controller 0 (rev
a2)
00:0b.0 USB Controller: nVidia Corporation MCP51 USB Controller (rev a2)
00:0b.1 USB Controller: nVidia Corporation MCP51 USB Controller (rev a2)
00:0d.0 IDE interface: nVidia Corporation MCP51 IDE (rev a1)
00:0e.0 IDE interface: nVidia Corporation MCP51 Serial ATA Controller
(rev a1)
00:0f.0 IDE interface: nVidia Corporation MCP51 Serial ATA Controller
(rev a1)
00:10.0 PCI bridge: nVidia Corporation MCP51 PCI Bridge (rev a2)
00:10.1 Audio device: nVidia Corporation MCP51 High Definition Audio
(rev a2)
00:14.0 Bridge: nVidia Corporation MCP51 Ethernet Controller (rev a1)
00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron]
HyperTransport Technology Configuration
00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron]
Address Map
00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron]
DRAM Controller
00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron]
Miscellaneous Control
01:06.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8169
Gigabit Ethernet (rev 10)
01:07.0 Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet
Controller (rev 02)
01:0e.0 FireWire (IEEE 1394): VIA Technologies, Inc. IEEE 1394 Host
Controller (rev 80)
Comment 1 Francois Romieu 2006-12-03 15:12:51 UTC
Created attachment 9729 [details]
r8169 changes from 2.6.18.3 to 2.6.19

The tarball includes the changes from 2.6.18.3 to 2.6.19. Actually 2.6.18.3
does not differ from 2.6.18 with relation to the r8169.c driver. The patches
are numbered in the order in which they should be applied.

Can you do a binary search to identify the first (resp. last) broken (resp
working) patch ?

-- 
Ueimor
Comment 2 Hugues Freville 2006-12-04 12:23:44 UTC
Hello,

just made some test, incrementaly patching r8169.c from 2.6.18.3
last working patch : 03
first broken patch : 04

i'll look at the 04 patch content, trying to understand the changes
Comment 3 Hugues Freville 2006-12-04 13:07:46 UTC
i just activated debug in r8169.c
loading patchlevel3 and then patchlevel4, i'm not able to see differences


dmesg after loading patchlevel3:
r8169 Gigabit Ethernet driver 2.2LK-NAPI loaded
ACPI: PCI Interrupt 0000:01:06.0[A] -> Link [APC1] -> GSI 16 (level, low) -> IRQ 217
r8169: mac_version == RTL_GIGA_MAC_VER_E (0002)
r8169: phy_version == RTL_GIGA_PHY_VER_E (0000)
eth2: Identified chip type is 'RTL8169s/8110s'.
eth2: RTL8169 at 0xffffc20000028000, 00:e0:4c:31:7d:2d, IRQ 217
r8169: mac_version == RTL_GIGA_MAC_VER_E (0002)
r8169: phy_version == RTL_GIGA_PHY_VER_E (0000)
r8169: MAC version != 0 && PHY version == 0 or 1
r8169: Do final_reg2.cfg
r8169: Set MAC Reg C+CR Offset 0x82h = 0x01h
r8169: <6>r8169: Set MAC Reg C+CR Offset 0xE0. Bit-3 and bit-14 MUST be 1


dmesg after loading patchlevel4:
r8169 Gigabit Ethernet driver 2.2LK-NAPI loaded
ACPI: PCI Interrupt 0000:01:06.0[A] -> Link [APC1] -> GSI 16 (level, low) -> IRQ 217
r8169: mac_version = 0x02
r8169: phy_version == RTL_GIGA_PHY_VER_E (0000)
eth2: RTL8169s/8110s at 0xffffc20000028000, 00:e0:4c:31:7d:2d, IRQ 217
r8169: mac_version = 0x02
r8169: phy_version == RTL_GIGA_PHY_VER_E (0000)
r8169: MAC version != 0 && PHY version == 0 or 1
r8169: Do final_reg2.cfg
r8169: Set MAC Reg C+CR Offset 0x82h = 0x01h
r8169: <6>r8169: Set MAC Reg C+CR Offset 0xE0. Bit-3 and bit-14 MUST be 1

Comment 4 Hugues Freville 2006-12-12 18:14:56 UTC
Created attachment 9800 [details]
little patch re-sending  TxEnb/RxEnb first

Hello,

i got something :-)

The patch is really simple, 
i don't understand all card configuration function
but my understanding is that the line :
    RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
was move from first to last issue command in function rtl8169_hw_start

moving back the command in first position solved my speed problem

do you know why this line was moved ?

thank you
Comment 5 Francois Romieu 2006-12-17 14:47:41 UTC
Created attachment 9861 [details]
Typo: device enable registers must not be accessed twice

Sorry for the delay. I have been a bit busy.

Can you try the attached patch on top of 2.6.20-rc1 ?

It should _really_ do the same thing as Realtek's driver this time.

-- 
Ueimor
Comment 6 Hugues Freville 2006-12-21 15:10:43 UTC
Hello,

i've just patch, build and test 2.6.20-rc1

speed is ok, got about 620Mbit/s

thank you,
Comment 7 Francois Romieu 2007-01-01 14:02:09 UTC
Fix has been included in mainline under id
81f4e6c190a0fa016fd7eecaf76a5f95d121afc2 :

http://www.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=81f4e6c190a0fa016fd7eecaf76a5f95d121afc2

It is available in 2.6.20-rc3.

-- 
Ueimor

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