C2 and C3 are disabled on an SMP system. Enable it.
Created attachment 4800 [details] Patch to enable C2 and C3 on SMP
Created attachment 4801 [details] Patch to enable C2 and C3 on SMP
Created attachment 4803 [details] Patch to enable C2 and C3 on SMP - Take 3
Created attachment 4834 [details] Patch to enable C2 and C3 on SMP - Take 4 This patch obsoletes all the earlier patches. Changes from Take 3 version: - Do a invalid cache before C3 invocation. - BM_DISABLE is not required for SMP. Remove Enabling/Disabling and BM history in SMP case.
If you do an #ifdef ARCH_HAS_CSTATE_INIT void arch_cstate_init(struct acpi_processor_power *pow, unsigned int cpu); #else static inline void arch_cstate_init(struct acpi_processor_power *pow, unsigned int cpu) { return; } #endif somewhere in .h you can get rid of the #ifdef lines in .c files -- that's the common way of doing this in the kernel. also, +ifdef CONFIG_X86 +processor-objs += ../../arch/i386/kernel/acpi/cstate.o +endif is ugly. Better EXPORT_SYMBOL() what you need in processor.o, and build arch/i386/kernel/acpi/cstate.o into the kernel if _PRCOESSOR is m or y.
Created attachment 4837 [details] Patch to enable C2 and C3 on SMP - Take 5 Obsoletes all earlier pactches. Changes from patch 4: - Minor formatting changes - Changes based on Review comments
Created attachment 4959 [details] more changes related tp L2 cache and C3 state
applied patch in comment #7 to acpi-test tree
Created attachment 4979 [details] Remove some debug printk's from above patch. Incremental patch over the previous one. Removes some debug printks that were in the above patch by mistake.
applied comment #9 to-linus
shipped in 2.6.13-rc5 -- closing.